	中国嵌入式创新应用大会
	首届中国开源IP核标准化设计竞赛结果评选结果揭晓
	数字软 IP 核质量标准自评表格（简化版）
	Innovision公司与全球领先的半导体公司签定NFC合约
	Beceem选用CEVA-XC DSP内核-Beceem采用CEVA旗舰产品CEVA-XC DSP内核

	CK-CORE是面向嵌入式系统和SOC应用的32位高性能低功耗处理器IP核系列，主要包括CK510、CK520、CK510E、CK510S、CK560和CK560E。 [ 2010.07.27 ]
	High Speed JPEG Decoder [ 2010.07.19 ]
	Single link and dual link DVI transmitter with support up to 1080p [ 2010.07.19 ]
	High Speed JPEG Encoder [ 2010.07.19 ]
	PAL NTSC Encoder with VBI, CC, TT and HD Encoder [ 2010.07.19 ]
	HDMI Tx supporting up to 1080p resolution [ 2010.07.19 ]
	STM0/1/4 SDH Deframer Core [ 2010.07.15 ]
	32 bits RISC CPU Core with CACHE andMMU [ 2010.07.15 ]
	CS327D 32-Bit Secure RISC Processor [ 2010.07.15 ]
	Secure RISC Core CS326D [ 2010.07.15 ]
	Secure RISC Core CS325D [ 2010.07.15 ]
	Secure RISC Core CS322D [ 2010.07.15 ]
	Secure RISC Core CS320D [ 2010.07.15 ]
	Secure RISC Core CS320 [ 2010.07.15 ]
	RISC Core C312 [ 2010.07.15 ]
	RISC Core C311 [ 2010.07.15 ]
	RISC Secure RISC Core C310 [ 2010.07.15 ]
	RISC Core C306 [ 2010.07.15 ]
	C*CORETM C310S是完全可综合的32 位嵌入式RISC CPU [ 2010.07.15 ]
	VoIP and IPTV Internet IP core [ 2010.07.14 ]

	RISC Secure RISC Core C310
	Secure RISC Core CS320
	32 bits RISC CPU Core with CACHE andMMU
	Optimally Performance/Power/Memory balanced DSP core
	XtensaⅤ是可配置的处理器
	Very low power, compact DSP Core
	Haokai_PLL_130CHRT_02, a 0.13 μm phase locked loop ;Output frequency range: 20 MHz to 1.0 GHz,RMS period jitter: 3.5 ps
	SMIC 0.18um 3.3v-1.8v Power Regulator
	a complete, silicon-proven, system-level IP interface operating at up to 1600 Mbps.
	UTMI interface support HS/FS/LS
	Optimized for low area and power DDR2/3-Lite SDRAM IP complete solution.
	Mid-range DSP core
	Licensable, High-Performance Application Oriented DSP Processor
	Floating Point Multiplier - (Module Compiler Only)
	Haokai_PLL_130SMIC_02, a 0.13 μm phase locked loop;Output frequency range: 20 MHz to 1.4 GHz,RMS period jitter: 4 ps
	Optimized for low area and power DDR2/3-Lite SDRAM IP complete solution.
	High Speed SPI - AHB IP Core
	Arithmetic Saturation and Rounding Logic
	J83 A,B,C and DVB-C channel decoder
	Secure RISC Core CS320D

	FFT [ 2010.07.08 ]
	实现turbo码 IP [ 2010.05.13 ]
	标准8051软核采购-电科院 [ 2010.05.09 ]
	spi [ 2010.04.11 ]
	数字上下变频 [ 2010.03.29 ]
	数字上下变频 [ 2010.03.29 ]
	low power IP core optimizition [ 2010.03.04 ]
	AVR8位IP核 [ 2010.03.03 ]
	需求80251 IP核 [ 2009.08.31 ]
	8051 IP Core [ 2009.07.13 ]
	flash EEPROM [ 2008.10.31 ]
	8通道单端/差分16位A/D模数转换器 IP Core [ 2008.09.11 ]
	EEPROM或Flash IP Core [ 2008.09.11 ]
	C8051 IP Core [ 2008.09.11 ]
	DRAM [ 2008.08.12 ]
	i2c_master [ 2008.08.10 ]

	The Universal Serial Bus (USB) has evolved to the standard interconnect between computers and peripherals.
	Core_arm
	MC8051. Oregano Systems 8-bit Microcontroller IP-Core
	I2C
	I2C-Master / Slave Core
	PCI_core
	Ethernet
	SDRAM
	FFTProcessor
	jpeg
	Synthesizable model of Atmel ATmega103 microcontroller
	RISCMCU
	microprocessor
	Bluetooth
	can
	AHBAHB
	Embedded_risc
	camera
	PS2
	SARM7TM

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